TY  - GEN
AU  - Claesen, Luc J.M., ed.
TI  - Formal VLSI correctness verification : VLSI design methods 2
SN  - 0-444-88688-5
PY  - 1990///
CY  - Amsterdam
PB  - Elsevier
KW  - INTERGRATED CIRCUITS-VLSI
KW  - COMPUTER AIDED DESIGN
ER  -